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989 IP
801
0.118
Two Port Register File Compiler IP, UMC 0.13um HS/FSG process
UMC 0.13um Logic HS FSG Synchronous high density Low Power Two Port Register File SRAM memory compiler....
802
0.118
Two Port Register File Compiler IP, UMC 0.13um LL process
UMC 0.13um LL Logic/FSG process high density synchronous Two Port Register File SRAM memory compiler....
803
0.118
Two Port Register File Compiler IP, UMC 0.13um SP/FSG process
UMC 0.13um SP/FSG Logic process synchronous Two Port (1R1W) Register File SRAM memory compiler....
804
0.118
Two Port Register File Compiler IP, UMC 0.153um MS process
UMC 0.153um Mixed-Mode/Logic process synchronous Two Port (1R1W) Register File SRAM memory compiler....
805
0.118
Two Port Register File Compiler IP, UMC 0.162um Logic process
UMC 0.162um Logic process synchronous Two Port Register File SRAM memory compiler....
806
0.118
Two Port Register File Compiler IP, UMC 0.18um G2 process
UMC 0.18um GII Logic process synchronous Two Port (1R1W) Register File SRAM memory compiler....
807
0.118
Two Port Register File Compiler IP, UMC 0.25um process
UMC 0.25um Logic process synchronous Two Port Register File compiler....
808
0.118
Two Port Register File Compiler IP, UMC 0.25um process
UMC 0.25um Logic process synchronous low density Low Power Two Port (1R1W) SRAM memory compiler....
809
0.118
Two Port Register File Compiler IP, UMC 0.35um process
UMC 0.35um Logic process standard asynchronous high density Two Port (1R1W) SRAM memory compiler....
810
0.118
Two Port Register File Compiler IP, UMC 0.35um process
UMC 0.35um Logic process standard asynchronous low density Low Power Two Port (1R1W) SRAM memory compiler....
811
0.118
Two Port Register File Compiler IP, UMC 0.35um process
UMC 0.35um Logic process synchronous high density Two Port (1R1W) SRAM memory compiler....
812
0.118
Two Port Register File Compiler IP, UMC 0.35um process
UMC 0.35um Logic process synchronous low density Low Power Two Port (1R1W) SRAM memory compiler....
813
0.118
Two Port Register File Compiler IP, UMC 0.35um process
UMC 0.35um Logic process standard asynchronous high density Two Port (1R1W) SRAM memory compiler....
814
0.118
Two Port Register File Compiler IP, UMC 0.35um process
UMC 0.35um Logic process standard asynchronous low density Low Power Two Port (1R1W) SRAM memory compiler....
815
0.118
Two Port Register File Compiler IP, UMC 0.35um process
UMC 0.35um Logic process synchronous high density Two Port (1R1W) SRAM memory compiler....
816
0.118
Two Port Register File Compiler IP, UMC 0.35um process
UMC 0.35um Logic process synchronous low density Low Power Two Port (1R1W) SRAM memory compiler....
817
0.118
Two Port Register File Compiler IP, UMC 28nm HLP process
UMC 28nm HLP/ Low-K Two Port Register File compiler....
818
0.118
Two Port Register File Compiler IP, UMC 28nm HLP process
UMC 28nm HLP peripheral LVT Two Port Register File memory compiler....
819
0.118
Two Port Register File Compiler IP, UMC 40nm LP process
UMC 40nm LP/RVT Low-K Logic Two Port Register File memory compiler....
820
0.118
Two Port Register File Compiler IP, UMC 40nm LP process
UMC 40nm LP/LVT process, Two Port Register File with LVT....
821
0.118
Two Port Register File Compiler IP, UMC 40nm LP process
UMC 40nm LP Two Port Register File with Sleep/Retention/Nap mode feature....
822
0.118
Two Port Register File Compiler IP, UMC 55nm LP process
UMC 55nm LP Logic process Synchronous Two Port Register File memory compiler....
823
0.118
Two Port Register File Compiler IP, UMC 55nm LP process
UMC 55nm LP/ Low-K process PG Two Port Register File compiler....
824
0.118
Two Port Register File Compiler IP, UMC 55nm SP process
UMC 55nm SP/RVT and HVT Low-K Logic process synchronous ultra high density/6T cell Two Port Register File memory compiler....
825
0.118
Two Port Register File Compiler IP, UMC 55nm SP process
UMC 55nm SP Low-K Logic process synchronous Two Port Register File memory compiler....
826
0.118
Two Port Register File Compiler IP, UMC 65nm LL process
UMC 65nm LL/RVT Low-K Logic process synchronous high density Two Port Register File SRAM memory compiler....
827
0.118
Two Port Register File Compiler IP, UMC 65nm SP process
UMC 0.65um SP/RVT Low-K Logic process synchronous Two Port Register File memory compiler....
828
0.118
Two Port Register File Compiler IP, UMC 90nm LL process
UMC 90nm LL/RVT Synchronous high density Two Port Register File memory compiler....
829
0.118
Two Port Register File Compiler IP, UMC 90nm SP process
UMC 90nm Standard Performance Low-K process Two Port SRAM Register File compiler....
830
0.118
Two Port Register File Compiler IP, UMC 90nm SP process
UMC 90nm SP Logic Low-K process synchronous Two Port (1R1W) Register File SRAM memory compiler....
831
0.0
1 Port High-Current Register File Compiler with Column Redundancy, Low Leakage with retention, Power Gating w/wo retention, Dual Rail, Mixed VT option
1 Port Register File Compiler with Column Redundancy, Low Leakage with retention, Power Gating w/wo retention, Dual Rail, Mixed VT option...
832
0.0
2 Port High-Density Register File Compiler with Column Redundancy, Low Leakage with retention, Power Gating w/wo retention, Dual Rail, Mixed VT option
2 Port High-Density Register File Compiler with Column Redundancy, Low Leakage with retention, Power Gating w/wo retention, Dual Rail, Mixed VT option...
833
0.0
1 Port Multi-Bank Register File Compiler with Column Redundancy, Low Leakage with retention, Power Gating w/wo retention, Dual Rail, Mixed VT option
1 Port Multi-Bank Register File Compiler with Column Redundancy, Low Leakage with retention, Power Gating w/wo retention, Dual Rail, Mixed VT option...
834
0.0
2048bits EEPROM with configuration 16p8w16bit
130GF_EEPROM_05 is a nonvolatile electrically erasable programmable read-only memory (EEPROM) with volume 2048bit, which is organized as 16 pages of 8...
835
0.0
104x1 Bits OTP (One-Time Programmable) IP, VI- 0.15μm 1.8V/6V BCD G2 EPI Process
The ATO00104X1VI150BIO2N2B is organized as a 104-bit by 1 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in VI- 0.15μ...
836
0.0
512-bit EEPROM (NTLab)
The block is a nonvolatile electrically erasable programmable read-only memory (EEPROM) with volume 512 bits (16(bit per word) x 2(word per page) x 16...
837
0.0
512-bit EEPROM with configuration 16p1w32bit
The block is a nonvolatile electrically erasable programmable read-only memory (EEPROM) with volume 512 bits (32(bit per word) x 1(word per page) x 16...
838
0.0
512bit EEPROM IP with configuration 16p2w16bit
180SMIC_EEPROM_09 is a nonvolatile electrically erasable programmable read-only memory (EEPROM) with volume 512 bits which is organized as 16 pages of...
839
0.0
512x1 Bits OTP (One-Time Programmable) IP, HHGrac- 95nm 1.5V/5V Embedded SONOS Flash (EF095LP)
The ATO00512X1HH095SON3NA is organized as a 512-bits by 1 one-time programmable in parallel mode. This is a kind of non-volatile memory fabricated in ...
840
0.0
512x1 Bits OTP (One-Time Programmable) IP, MXI- 0.18μm 1.8V/5V CMOS 18B Process
The ATO00512X1MX180LB52ND is organized as a 512-bit by 1 one-time programmable (OTP). This is a type of non-volatile memory fabricated in MXI- 0.18μ...
841
0.0
512x1 Bits OTP (One-Time Programmable) IP, MXI- 0.18μm 1.8V/5V CMOS 18B Process,Using 5V devices only
The ATO00512X1MX180LB52ND is organized as a 512-bit by 1 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in MXI- 0.18μm ...
842
0.0
512x1 Bits OTP (One-Time Programmable) IP, MXI- 0.18μm 1.8V/5V CMOS 18B1(BCD_EPI)
The ATO00512X1MX180B152NA is organized as a 512x1 one-time programmable(OTP). This is a type of non-volatile memory fabricated in MXI- 0.18μm CMOS 18B...
843
0.0
512x1 Bits OTP (One-Time Programmable) IP, MXI- 0.18μm 1.8V/5V Logic Process
The ATO00512X1MX180LA52NA is organized as a 512-bit by 1 one-time programmable (OTP). This is a type of non-volatile memory fabricated in MXIC 0.18μm...
844
0.0
512x1 Bits OTP (One-Time Programmable) IP, NJR- 0.05μm UD50SP Process
The AT512X1UD50SP0AA is organized as a 512-bit by 1 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in UD50SP process. ...
845
0.0
512x1 Bits OTP (One-Time Programmable) IP, S-_h-nix HC130SFN 1.8V/2.8V Process
The ATO00512X1HY180CIS3NA is organized as a 512-bit by 1 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in SK_hynix HC...
846
0.0
512X1 Bits OTP (One-Time Programmable) IP, TSM- 0.18μm SiGe BiCMOS 1.8V/3.3V Process
The ATO00512X1TS180SGE3NA is organized as a 512-bit by 1 one-time programmable (OTP). This is a type of non-volatile memory fabricated in TSMC 0.18μm...
847
0.0
512x1 Bits OTP (One-Time Programmable) IP, TSM- 152nm 1.8V/3.3V Mixed Signal
The ATO00512X1TS152GMS3NA is organized as a 512-bits by 1 one-time programmable in parallel mode. This is a kind of non-volatile memory fabricated in...
848
0.0
512x1 Bits OTP (One-Time Programmable) IP, UM- 0.18μm 1.8V/5V BCD Process
The ATO00512X1UM180B502NA is organized as a 512-bit by 1 one-time programmable (OTP). This is a type of non-volatile memory fabricated in UM- 0.18μm B...
849
0.0
512x1 Bits OTP (One-Time Programmable) IP, VI- 0.15μm BCD Generation-2 Process
The ATO00512X1VI150B252NB is organized as a 512-bit by 1 one-time programmable (OTP). This is a type of non-volatile memory fabricated in VI- 0.15μm B...
850
0.0
512x1 Bits OTP (One-Time Programmable) IP, VI- 0.15μm BCD Generation-2 Process
The ATO00512X1VI150B252NA is organized as a 512-bit by 1 one-time programmable (OTP). This is a type of non-volatile memory fabricated in VI- 0.15μm B...